Introduction
This project proposes a modified bridgeless Single-Ended Primary Inductor Converter (SEPIC) topology for power factor correction (PFC) designed to reduce conduction losses and simplify circuit structure. The design targets medium-line-frequency applications, such as LED lighting and small power supplies, where improved efficiency and reduced component count are critical. Bridgeless configuration eliminates the input bridge diode, lowering conduction paths and losses, while the modified SEPIC topology provides regulated output voltage with minimal electromagnetic interference.
Objectives
- To design a modified bridgeless SEPIC converter for PFC applications with a simple structure.
- To reduce conduction losses by eliminating additional diodes and optimizing the conduction path.
- To maintain high power factor and low total harmonic distortion (THD).
- To validate design through simulation and prototype testing at medium-line frequencies.
Methodologies
- Study and analyze existing SEPIC and bridgeless PFC converter topologies.
- Develop mathematical models for conduction losses, switching behavior, and power factor performance.
- Simulate converter operation with MATLAB/Simulink or PLECS, including conduction loss and THD analysis.
- Construct a hardware prototype to verify efficiency, power factor, and emission characteristics.
Expected Outcomes
- A modified bridgeless SEPIC converter with reduced conduction losses and simplified design.
- High power factor correction with low harmonic distortion suitable for medium-line-frequency devices.
- Improved efficiency and reliability in targeted applications.
- Confirmed performance through experimental results comparable to simulations.
Applications
- Medium-line-frequency power supplies such as LED drivers, chargers, and small appliances.
- Power factor correction circuits in energy-efficient lighting solutions.
- Low-cost, compact PFC modules for industrial and consumer electronics.
- Renewable energy systems requiring efficient AC-DC conversion stages.